Hamilton Institute Seminar

Wednesday, March 13, 2019 - 13:00 to 14:00
Hamilton Institute Seminar Room 317, 3rd Floor, Eolas Building, North Campus, Maynooth University

Speaker: ​Professor Miriam Leeser, Department of Electrical and Computer Engineering, Northeastern University, USA.

Title: "Preserving Privacy through Processing Encrypted Data."

Abstract: Secure Function Evaluation (SFE) allows an interested party to evaluate a function over private data without learning anything about the inputs other than the outcome of this computation. This offers a strong privacy guarantee: SFE enables, e.g., a medical researcher, a statistician, or a data analyst, to conduct a study over private, sensitive data, without jeopardizing the privacy of the study's participants (patients, online users, etc.). Nevertheless, applying SFE to big data poses several challenges, most significantly in the excessive processing time for applications.

In this talk, I describe Garbled Circuits (GCs), a technique for implementing SFE that can be applied to any problem that can be described as a Boolean circuit.  GC is a particularly good application to accelerate with FPGAs due to the good match between GC implementations and FPGA circuits.  As our goal is to use GC for
extremely large problems, including machine learning algorithms, we propose to address these problems by running GCs on clusters of machines equipped with FPGAs in the data center to accelerate the processing. In
this talk, I will present our progress and challenges with this approach.

Biography: Miriam Leeser is Professor of Electrical and Computer Engineering at Northeastern University, currently on sabbatical at Maynooth University in Ireland.  She received the prestigious Fulbright Scholar Award in 2018 to support this sabbatical.  She has been doing research in FPGAs for decades, and has done ground breaking research in floating point implementations, unsupervised learning and most recently privacy
preserving data processing.  She has been a faculty member at Northeastern since 1996, where she is head of the Reconfigurable Computing Laboratory and a member of the Computer Engineering group. She is a senior member of ACM, IEEE and SWE.